Semiconductor processing often include many distinct manufacturing steps. With the current state of technology, circuit components are routinely formed on nanometer scales, and sensitive manufacturing techniques are required. For instance, with integration schemes for shallow-trench-isolation (“STI”) gate formation, a sacrificial film must be removed preferentially in the presence of a selective material in a nanometer thin trench. As semiconductor technology continues to evolve, these semiconductor substrate trenches continue to shrink in width, which makes film removal even more difficult.
These small width trenches create a need for delicate etching techniques. Although a variety of etch techniques are available, few provide the selective removal necessary for such intricate detail. For example, wet removal using hydrogen-fluoride solutions can be used for a selective removal. However, such a wet removal cannot be used for STI recessing because the process chemistry and bath life often cannot be sufficiently controlled for such detailed etching.
Dry etching techniques are available and have been shown to provide selective removal. For example, Siconi™ processes that use a combination of dry etchant gases including ammonia and a fluorine-containing gas have been used for better control of the material removal during the removal. However, the dry etchant gas still selectivity etches oxides of different quality at different rates. Although this oxide selectivity is often acceptable during semiconductor processing, in STI recessing, the minute selectivity can cause concave profiles in the STI trenches where a liner oxide is present with a flowable oxide. This slight concavity, or meniscus, can potentially cause integration issues with integrated passive device scaling and control gate polysilicon fill between the trenches. Thus, there is a need for improved intrench profiles in STI recess production. These and other needs are addressed by the present invention.